RISC-V guardian SiFive unveils new chip designs for low-powered AI at the edge
by Mike Wheatley · SiliconANGLEOpen-source semiconductor design company SiFive Inc. today unveiled its latest chip design blueprints, the SiFive Intelligence XM Series, saying these are the first based on its RISC-V architecture to include a highly scalable artificial intelligence matrix engine.
With the new blueprints, SiFive says, companies will be able to accelerate the development of RISC-V-based chips that are customized for AI workloads in data centers, autonomous machines and at the network edge.
SiFive was founded by the inventors the RISC-V instruction set architecture in 2016, with the goal being to commercialize and popularize its alternative chip format. Instruction sets are a collection of technologies that can be used to build central processing units. They describe the computing operations that the millions of transistors on a chip should carry out.
The company is a rival to the better-known Arm Holdings Plc, which also builds designs for CPUs, mostly focused on mobile devices such as smartphones. In addition to its chip designs, it also sells software for customers to design CPUs that implement them.
The biggest difference between RISC-V and Arm is that the former’s designs are entirely open-source, which means companies don’t have to pay licensing fees to use them.
SiFive’s architecture is used by numerous companies as the foundation of chips for AI workloads, internet of things gadgets and data center servers. The company cites a number of advantages for companies using its instruction sets, aside from the fact they’re free. For instance, they provide greater flexibility in terms of being able to customize the designs for different workloads, it says.
The new Intelligence XM Series instruction sets provide what SiFive says is an extremely scalable and efficient AI compute architecture that integrates scalar, vector and matrix engines, which are necessary to perform millions of calculations per second. They also provide extremely high bandwidth, the company says, while maintaining the high performance its customers are used to.
For instance, the new chips contain four X-Cores per cluster, with a single cluster able to deliver 16 tera operations per second of processing power. They also incorporate one terabyte of sustained memory bandwidth per cluster, accessible via a high-bandwidth CHI port for coherent memory access.
According to SiFive, the Intelligence XM chip blueprints are ideal for organizations that need to run AI on low-powered devices, such as IoT sensors, autonomous vehicles, robots and drones.
Chief Executive Patrick Little said the new designs will enable companies to keep pace with the rapid evolution of AI while maintaining the unique benefits its open processor standard provides. “We’re already supplying our RISC-V solutions to five of the ‘Magnificent 7’ companies, and as companies pivot to a software-first design strategy, we are working on new AI solutions automotive to datacenter and the intelligent edge and IoT,” he said.